Verilog® HDL: a guide to digital design and synthesis (Record no. 4879)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 00499nam a2200181Ia 4500 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 240925s9999 xx 000 0 und d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 134516753 |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.392 PAL |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Samir , Palnitkar - |
| 245 #0 - TITLE STATEMENT | |
| Title | Verilog® HDL: a guide to digital design and synthesis |
| 250 ## - EDITION STATEMENT | |
| Edition statement | NA |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | California: |
| Name of publisher, distributor, etc. | Sunsoft press |
| Date of publication, distribution, etc. | ,1996. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xx,479p. |
| Other physical details | NA |
| Type of unit | Original |
| 500 ## - GENERAL NOTE | |
| General note | Includes Index |
| 600 ## - SUBJECT ADDED ENTRY--PERSONAL NAME | |
| Personal name | Telecommunication Engineering |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Technology |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Koha item type | Books |
| Withdrawn status | Lost status | Damaged status | Not for loan | Collection | Home library | Current library | Date acquired | Source of acquisition | Cost, normal purchase price | Total checkouts | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Write Off | Electrical Engineering | UITU Library | UITU Library | 03/04/2000 | NA | 300.00 | 621.392 PAL | Q2380 | 09/25/2024 | 09/25/2024 | Books |