00636nam a2200193Ia 4500008004100000020001400041082001600055100002400071245005900095250000700154260003900161300002900200500001900229600003400248650001500282942000700297952012300304999001500427240925s9999    xx            000 0 und d  a134516753  a621.392 PAL  aSamir , Palnitkar - 0aVerilog® HDL: a guide to digital design and synthesis  aNA  aCalifornia:bSunsoft pressc,1996.  axvii,569p.bNAfOriginal  aIncludes Index  aTelecommunication Engineering  aTechnology  cBK  011040708ELaUITUbUITUd2000-05-01ePhoto Statg300.00l0o621.392 PALpQ2379r2024-09-25 07:12:46w2024-09-25yBK  c4878d4878