00650nam a2200193Ia 4500008004100000020001500041082001600056100002400072245005800096250000800154260004200162300002700204500001900231600002700250650001500277942000700292952014200299999001500441240925s9999    xx            000 0 und d  a8129700921  a621.392 PAL  aSamir , Palnitkar - 0aVerilog®HDL: a guide to digital design and synthesis  a2nd  aSingapore:bPearson educationc,2003.  axiv,778p.bNAfPirated  aIncludes Index  aElectronic Engineering  aTechnology  cBK  001040708ELaUITUbUITUd2007-01-22eF.B.Cg350.00l1o621.392 PALpQ6866q2026-05-07r2025-10-29 16:46:21s2025-10-29w2024-09-25yBK  c9365d9365