<?xml version="1.0" encoding="utf-8" ?> <rss version="2.0" xmlns:opensearch="http://a9.com/-/spec/opensearch/1.1/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"> <channel> <title> <![CDATA[UIT University Search for 'au:&quot;Samir , Palnitkar -&quot;']]> </title> <link> /cgi-bin/koha/opac-search.pl?q=ccl=au%3A%22Samir%20%2C%20Palnitkar%20-%22&#38;sort_by=relevance&#38;format=rss </link> <atom:link rel="self" type="application/rss+xml" href="/cgi-bin/koha/opac-search.pl?q=ccl=au%3A%22Samir%20%2C%20Palnitkar%20-%22&#38;sort_by=relevance&#38;format=rss"/> <description> <![CDATA[ Search results for 'au:&quot;Samir , Palnitkar -&quot;' at UIT University]]> </description> <opensearch:totalResults>14</opensearch:totalResults> <opensearch:startIndex>0</opensearch:startIndex> <opensearch:itemsPerPage>50</opensearch:itemsPerPage> <atom:link rel="search" type="application/opensearchdescription+xml" href="/cgi-bin/koha/opac-search.pl?q=ccl=au%3A%22Samir%20%2C%20Palnitkar%20-%22&#38;sort_by=relevance&#38;format=opensearchdescription"/> <opensearch:Query role="request" searchTerms="q%3Dccl%3Dau%253A%2522Samir%2520%252C%2520Palnitkar%2520-%2522" startPage="" /> <item> <title> Verilog® HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:134516753</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=4880</link> <description> <![CDATA[ <p> By Samir , Palnitkar -.<br /> California: Sunsoft press 1996 .<br /> xix,817p. , Includes Index 134516753 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=4880">Place hold on <em>Verilog® HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=4880</guid> </item> <item> <title> Verilog® HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:134516753</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=4879</link> <description> <![CDATA[ <p> By Samir , Palnitkar -.<br /> California: Sunsoft press 1996 .<br /> xx,479p. , Includes Index 134516753 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=4879">Place hold on <em>Verilog® HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=4879</guid> </item> <item> <title> Verilog® HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:134516753</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=4878</link> <description> <![CDATA[ <p> By Samir , Palnitkar -.<br /> California: Sunsoft press 1996 .<br /> xvii,569p. , Includes Index 134516753 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=4878">Place hold on <em>Verilog® HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=4878</guid> </item> <item> <title> Verilog®HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8129700921</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9367</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8129700921.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2003 .<br /> xiv,778p. , Includes Index 8129700921 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9367">Place hold on <em>Verilog®HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9367</guid> </item> <item> <title> Verilog®HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8129700921</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9366</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8129700921.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2003 .<br /> xiv,778p. , Includes Index 8129700921 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9366">Place hold on <em>Verilog®HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9366</guid> </item> <item> <title> Verilog®HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8129700921</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9365</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8129700921.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2003 .<br /> xiv,778p. , Includes Index 8129700921 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9365">Place hold on <em>Verilog®HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9365</guid> </item> <item> <title> Verilog®HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8129700921</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9364</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8129700921.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2003 .<br /> xiv,778p. , Includes Index 8129700921 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9364">Place hold on <em>Verilog®HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9364</guid> </item> <item> <title> Verilog®HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8129700921</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9363</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8129700921.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2003 .<br /> xiv,778p. , Includes Index 8129700921 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9363">Place hold on <em>Verilog®HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9363</guid> </item> <item> <title> Verilog®HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8129700921</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9362</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8129700921.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2003 .<br /> xiv,778p. , Includes Index 8129700921 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9362">Place hold on <em>Verilog®HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9362</guid> </item> <item> <title> Verilog®HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8129700921</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9361</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8129700921.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2003 .<br /> xiv,778p. , Includes Index 8129700921 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9361">Place hold on <em>Verilog®HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9361</guid> </item> <item> <title> Verilog®HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8129700921</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9360</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8129700921.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2003 .<br /> xiv,778p. , Includes Index 8129700921 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9360">Place hold on <em>Verilog®HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9360</guid> </item> <item> <title> Verilog®HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8129700921</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9359</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8129700921.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2003 .<br /> xiv,778p. , Includes Index 8129700921 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9359">Place hold on <em>Verilog®HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9359</guid> </item> <item> <title> Verilog®HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8129700921</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=9358</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8129700921.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2003 .<br /> xiv,778p. , Includes Index 8129700921 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=9358">Place hold on <em>Verilog®HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=9358</guid> </item> <item> <title> Verilog® HDL: a guide to digital design and synthesis </title> <dc:identifier>ISBN:8178084899</dc:identifier> <link>/cgi-bin/koha/opac-detail.pl?biblionumber=7112</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8178084899.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Samir , Palnitkar -.<br /> Singapore: Pearson education 2001 .<br /> xxii,409p. , NA 8178084899 </p> ]]> <![CDATA[ <p> <a href="/cgi-bin/koha/opac-reserve.pl?biblionumber=7112">Place hold on <em>Verilog® HDL: a guide to digital design and synthesis</em></a> </p> ]]> </description> <guid>/cgi-bin/koha/opac-detail.pl?biblionumber=7112</guid> </item> </channel> </rss>
